‘S’ and ‘R’ stands for ‘Set’ and ‘Reset’ respectively.
S R Qₙ Qₙ₊₁
----------------
0 0 0 0 (no change)
0 0 1 1 (no change)
0 1 0 0 (reset)
0 1 1 0 (reset)
1 0 0 1 (set)
1 0 1 1 (set)
1 1 x ? (not allowed)
The J and K in the name of the flip-flop doesn’t have an expansion and was apparently chosen randomly (except that they are adjacent letters in the English alphabet).
J K Qₙ Qₙ₊₁
----------------
0 0 0 0 (no change)
0 0 1 1 (no change)
0 1 0 0 (reset)
0 1 1 0 (reset)
1 0 0 1 (set)
1 0 1 1 (set)
1 1 0 1 (toggle)
1 1 1 0 (toggle)
T stands for ‘toggle’.
T Qₙ Qₙ₊₁
------------
0 0 0 (no change)
0 1 1 (no change)
1 0 1 (toggle)
1 1 0 (toggle)
T flip-flop can be implemented by applying same signal to J and K inputs of a JK flip-flop.
--------
| |
T ->----->--|J Q |--->
| | |
v | |
| | |
--->--|K Q'|--->
| |
--------
D stands for ‘delay’.
D Qₙ Qₙ₊₁
------------
0 0 0 (no change)
0 1 1 (no change)
1 0 1 (toggle)
1 1 0 (toggle)
D flip-flop can be implemented with a JK flip-flop by applying the input signal at J and its complement at K.
--------
| |
D ->----->---|J Q |--->
| | |
v | |
------- | |
| NOT | | |
------- | |
| | |
v | |
--->---|K Q'|--->
| |
--------
Consists of a set of flip-flops.
Consists of a number of (cascaded) flip-flops that share a clock signal.
Output of a flip-flop is connected to the input of another flip-flop.
Data access could be of one of the following:
Output of last flip-flop connected input of the first, making a circular (or ‘ring’) counter.
aka:
A 4-bit (straight, ie not twisted) ring counter.
State | Q0 | Q1 | Q2 | Q3
-------|----|----|----|----
0 | 1 | 0 | 0 | 0
1 | 0 | 1 | 0 | 0
2 | 0 | 0 | 1 | 0
3 | 0 | 0 | 0 | 1
0 | 1 | 0 | 0 | 0
Complement of output of last flip-flop is connected to the input of the first flip-flop.
aka:
4 bit Johnson counter
State | Q0 | Q1 | Q2 | Q3
-------|----|----|----|----
0 | 0 | 0 | 0 | 0
1 | 1 | 0 | 0 | 0
2 | 1 | 1 | 0 | 0
3 | 1 | 1 | 1 | 0
4 | 1 | 1 | 1 | 1
5 | 0 | 1 | 1 | 1
6 | 0 | 0 | 1 | 1
7 | 0 | 0 | 0 | 1
0 | 0 | 0 | 0 | 0